1. Field of the Invention
This invention relates generally to reprogrammable memory devices and specifically to microcontrollers (hereinafter MCU) with internal electrically erasable programmable read only memory devices. This invention allows the improved reprogrammable memory device to define a page within an array of memory cells which is variable in size, erase only that data contained within the defined variable page while uneffecting the remaining data in the array of memory cells and then write new data to the defined variable page.
2. Description of the Prior Art
The current state of the art describes two types of reprogrammable memory devices for the purpose of erasing and writing to a program memory device. The first and traditional type of reprogrammable memory device may erase and write to the least addressable program memory location within an array of memory cells. The least addressable program memory location is typically defined as a word. Thus, the page size for this type of device is a word. To erase and program X number of pages, the reprogrammable memory device must execute X number of erase/write commands. The result of this technology is an independent erase and write cycle for each page of memory and is therefore a time consuming process.
The second type of reprogrammable memory device described by prior art defines a page as the entire physical contents of the program memory accessible by the MCU. Thus, the reprogrammable memory device sends a single erase command that erases the entire contents of the program memory. Each program memory word is subsequently reprogrammed by an independent write command. Devices that fall in this second category of reprogrammable memory devices are typically referred to as flash memory devices. While flash memory devices offer the benefit of reducing the time consumed in reprogramming the entire physical program memory over the traditional reprogrammable memory device, they suffer the detriment of an all or nothing approach. That is, flash memory devices are not capable of erasing and writing to selective addresses of program memory, but instead erase the entire physical program memory and require the rewriting of the entire program memory.
A recent development has employed flash memory in blocks at the chip level. That is, rather than having one large flash memory, there may be several smaller blocks of flash memory which allow the MCU to selectively erase and rewrite on a block by block basis. However, even with block flash memory, the MCU is not capable of subdividing individual blocks for erasure and rewriting nor is the MCU capable of word selective erasure as with the traditional reprogrammable memory device.
Finally, under prior art, semiconductor manufacturers have included both traditional reprogrammable memory and flash memory on the same device. However, this implementation requires the physical presence of both traditional reprogrammable memory device and flash memory. The result of this application are two separate program memories each controlled according to their respective technology. Thus, there exists a need for an improved reprogrammable memory device with variable page size because under prior art reprogrammable memory devices permit only the selective erase and write of the least addressable program memory location or bulk erase and write of the entire program memory.